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triSYCL
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sycl
SYCL for Vitis: Experimental fusion of triSYCL with Intel SYCL oneAPI DPC++ up-streaming effort into Clang/LLVM
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[SYCL][Vitis] Add ArchGenMLIR and AIE++
#238
keryell
opened
8 months ago
0
Add AMD AIE1 CGRA support with ACAP++/AIE++ and ArchGenMLIR for FPGA
#237
keryell
closed
10 months ago
0
Compilation issue with aie++
#236
keryell
opened
1 year ago
3
[SYCL][AIE][CMAKE] Fix cmake without aie
#235
Ralender
closed
1 year ago
0
[SYCL][AIE][DOC] Improve documentation
#234
keryell
closed
8 months ago
0
[ArchGenMLIR][NFC] More typo fixes
#233
keryell
closed
1 year ago
0
[SYCL][TEST][FPGA] Modernize edge detection example on FPGA
#232
keryell
opened
1 year ago
0
Add ArchGenMLIR
#231
Ralender
closed
1 year ago
2
Add the compiler-side and tests of the SYCL-like AIE++ API
#230
Ralender
closed
1 year ago
1
Last update for Vitis 2022.2
#229
keryell
closed
1 year ago
0
sycl-ls crashes with XRT in emulation mode
#228
keryell
closed
1 year ago
2
doc : fix a missing link
#227
Momellouky
closed
1 year ago
1
[SYCL][XRT] Add partial profilling support to pi_xrt
#226
Ralender
closed
1 year ago
0
Documentation update for Vitis 2022.2
#225
keryell
closed
1 year ago
0
`xrt_piEventGetProfilingInfo` not implemented
#224
keryell
opened
1 year ago
0
Merge upstream
#223
Ralender
closed
1 year ago
0
Bump minimist and mkdirp in /llvm/utils/vscode/llvm
#222
dependabot[bot]
opened
1 year ago
0
[SYCL][Vitis] Add support for running test without specific hardware features
#221
Ralender
closed
1 year ago
0
[SYCL][Vitis] Fix parallel_for with kernel_param
#220
Ralender
closed
1 year ago
3
kernel_param doesn't work with parallel_for
#219
gogo2
closed
1 year ago
2
PLRAM support
#218
gogo2
closed
1 year ago
1
Merge from upstream
#216
Ralender
closed
1 year ago
2
Various updates in version targeting Vitis 2022.2 and multi-devices
#215
keryell
closed
1 year ago
0
Various updates in version targeting Vitis 2022.2 and multi-devices
#214
keryell
closed
1 year ago
1
[SYCL][Driver] do not generate device (for FPGA) code with PIC
#213
Ralender
closed
1 year ago
1
fPIC error when compiling as shared library
#212
gogo2
closed
1 year ago
3
Bump certifi from 2021.10.8 to 2022.12.7 in /llvm/utils/git
#211
dependabot[bot]
opened
1 year ago
0
[SYCL][OpenCL] Select Intel or AMD/Xilinx FPGA
#210
Ralender
closed
1 year ago
6
Bump qs from 6.10.1 to 6.11.0 in /mlir/utils/vscode
#209
dependabot[bot]
opened
1 year ago
0
ONEAPI_DEVICE_SELECTOR does not work yet for `xrt`
#208
keryell
closed
1 year ago
1
[SYCL][Vitis] Fix bug in memset lowering
#207
Ralender
closed
1 year ago
0
Aggregate initialization crashes opt
#206
gogo2
closed
1 year ago
2
Merge upstream
#205
Ralender
closed
1 year ago
0
Bump minimatch from 3.0.4 to 3.1.2 in /mlir/utils/vscode
#204
dependabot[bot]
opened
1 year ago
0
Bump minimatch from 3.0.4 to 3.1.2 in /llvm/utils/vscode/llvm
#203
dependabot[bot]
opened
1 year ago
0
/unified/next stopped compiling with latest updates
#202
gogo2
closed
1 year ago
2
[SYCL][Vitis] Add sycl::ext::xilinx::annot to apply multiple annotations of the same loop.
#201
Ralender
closed
1 year ago
0
[SYCL][XRT] Select XRT over OpenCL, stop destructing xrt::kernel
#200
Ralender
closed
1 year ago
0
Bump minimist and mkdirp in /llvm/utils/vscode/llvm
#199
dependabot[bot]
closed
1 year ago
1
Update stable version from next branch
#198
keryell
closed
1 year ago
0
Merge upstream
#197
Ralender
closed
1 year ago
0
Wrong results of a simple kernel
#196
gogo2
closed
1 year ago
3
Fixes for archgen-mlir
#195
Ralender
closed
1 year ago
1
Improve for 2022.1
#194
keryell
closed
1 year ago
0
Re rebase upstream
#193
Ralender
closed
2 years ago
3
Build issue with RHEL8
#192
jyoung3131
opened
2 years ago
8
Fixes next vitis
#191
Ralender
closed
2 years ago
3
Bump pyjwt from 2.3.0 to 2.4.0 in /llvm/utils/git
#190
dependabot[bot]
closed
1 year ago
1
Merge from unified/next with Ubuntu 22.04 and Vitis 2022.1
#189
keryell
closed
2 years ago
0
There are still some xocc and XOCC in sycl/test/lit.cfg.py
#188
keryell
opened
2 years ago
1
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