-
# 个人环境
```bash
$ uname -a
Linux arch 5.12.5-arch1-1 #1 SMP PREEMPT Wed, 19 May 2021 10:32:40 +0000 x86_64 GNU/Linux
$ rustc --version
rustc 1.54.0-nightly (1c6868aa2 2021-05-27)
$ qemu-ris…
-
Hi,
I have seen your Oberon0 and Oberon7 compile for the Java-VM.
I am playing around with Oberon from time to time.
For example, I have translated the de Wachters RISC-V emulator to Pascal an…
-
One issue and one question (sorry if this isn't the right place for the second).
First, When attempting to clone the repositories submodules, I cannot fully check out the EASTL:
```
Cloning into 'C…
-
Run https://github.com/google/iree/blob/main/iree/hal/local/elf/elf_module_test.cc resulting into a segfault in qemu-riscv32. The same code works fine in x86_64 and RV64 Linux configs
```
$ {QEMU_…
-
Hi!
I was wondering if you accept soft-cpus like the [LatticeMico32](http://www.latticesemi.com/en/Products/DesignSoftwareAndIP/IntellectualProperty/IPCore/IPCores02/LatticeMico32.aspx) into the re…
-
The hardware clock rate on the RISC-V MIV platforms is off by a factor of 100. This simple tool simply writes two bytes (".\n") every 100ms:
```c
#include
#include
/* 100ms in hardware cycl…
-
Hello,
Now that I got qemu-system-riscv32.exe and qemu-system-riscv64.exe, which emulator (elf file and command line to invoke qemu) is needed to properly run RISC-V lbForth
Thanks for sharing.
…
-
I'm using the [toolchain binaries from SiFive](https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-8.3.0-2020.04.0-x86_64-linux-ubuntu14.tar.gz).
I can compile the program just fine wit…
-
**Describe the bug**
Most of the tests from memory protection directory can't be build for Qemu RISCV.
Build failed on qemu_riscv32 and qemu_riscv64:
`tests/kernel/mem_protect/futex/`
`tests/ker…
-
I defined `tohost` and `fromhost`as memory locations in the linker script for a bare-metal program that I'm trying to run within spike. But I can't find anywhere how these symbols are actually used. I…