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modelsim/questa Tcl Store implementation looks for vsim executable through PATH entries. Problem is that executable with such name exists not only in modelsim/questa installations, which causes errors…
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``` vhdl
package nested_function_bug is
procedure proc(param : integer);
end package;
package body nested_function_bug is
procedure proc(param : integer) is
variable foo : bit_vector(0 to par…
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I'm trying to synthesize with yosys Verilog code instantiating a standard BRAM template.
Yosys works fine until I've added the BRAM initialization.
The snippet of code creating problems is the followi…
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Only two out four actors are working with the HLS backend after Vivado HLS synthesis.
The Autocorellation and Reflection_coef actors seems to block while reading tokens.
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Author Name: **Fabrizio Ferrandi**
Original Redmine Issue: 715 from https://www.veripool.org
Original Date: 2014-02-14
Original Assignee: Wilson Snyder (@wsnyder)
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I've found another simula…
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Dears,
the following code seems to create problem with yosys read_verilog command.
I've tried both
read_verilog lshift.v
and
read_verilog -D__ICARUS__ lshift.v
This code has been generated by the …