-
Dunno why (probably typo) but AND abs is 2 cycles only (normally 4).
see : CPU6502.h
-
Hi,
test/uchess2.65C02 was updated upstream: http://benlo.com/files/Microchess6502.txt
It has a clear license now, BSD 3 Clause. Please update it for next crasm release.
-
http://anyplatform.net/media/guides/cpus/65xx%20Processor%20Data.txt says
Opcodes: ..............................................................................
Op Format 6502 6…
-
The 65C02 (and presumably 65C102) improved some cycle timings. See
http://6502.org/tutorials/65c02opcodes.html
The following test demonstrates that a real Master differs from JSBeeb's Master emulatio…
BigEd updated
8 years ago
-
I've wired this up to a breadboard. So far, I just have a Propeller and a 65C02 wired up.
I have tested the Propeller with a blinky demo and it seems to be stable.
When wire up the 65C02, it displa…
-
I've been debugging an issue with the French Touch's "Ansi Story" demo where the NTSC/PAL detection routine(*) would fail about half the time. The knock-on effect is that right at the end (of side-2),…
tomcw updated
8 years ago
-
After exit of AIMSICD and clearing AIMSICD from memory there are still some services running (may be the SMS detection )
 enhance the emulation? Assuming there would be any enhancements at all.
Do you think the 65C02 could be pushed clo…
-
This post just to advise that Applewin and Virtual][ handle the same program differently (crash on Applewin, not on Virtual2) and asking for help...
Forgive me for the verbosity of this post and the l…
-
```
What steps will reproduce the problem?
1. load attached TAP file in either Oric-1 or Atmos mode.
2.
3.
What is the expected output? What do you see instead?
In Oricutron v0.9 you just get a 'Read…