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Based on https://github.com/riscv/riscv-qemu/pull/79 there are suggestions for some new default CONFIG options for `arch/riscv/configs/defconfig`.
When I looked into the v4.15-rc3 for the current …
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I am executing a one OpenCV executable in sifive riscv-linux and it is generating output as a text file. Generated text file I can see by using ls command but how I want to copy text file from riscv-l…
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When tried to build as it is suggested in the README file. Got this error:
```
riscv32-elf-ld: /home/pkukushkin/own/diosix/target/riscv32imac-unknown-none-elf/release/deps/kernel-f5bc6e927e6214b5.ke…
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I see that sp is used here:
https://github.com/riscv/riscv-newlib/blob/77e11e1800f57cac7f5468b2bd064100a44755d4/libgloss/riscv/crt0.S#L38
But before that it was not set anywhere.
I see that sp is…
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Hello,
I try to use tag: hifiveu-1.0-2018-03-20 (commit id: 0f03e51) to bring up linux on vc707 board.
My freedom sources are up to date (commit id: 397c395).
However, my terminal hangs as you…
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I'm getting an error when I try to generate Verilog files for the E300.
`make -f Makefile.e300artydevkit verilog` runs successfully, but running `make -f Makefile.e300artydevkit mcs` gives me the fol…
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fee51834684a6fe7d5e44d577983d8d5611f0f2e
```
>>> host-e2fsprogs 1.43.4 Building
...
./../misc/create_inode.c:399:18: error: conflicting types for ‘copy_file_range’
static errcode_t copy_fi…
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I'm having a similar issue to #44 .
I'm trying to run it with Spike.
Here's the console log:
```
ssr-risc-v@chisel:~/TestEnv/freedom-u-sdk> ./work/riscv-isa-sim/spike -p4 ./work/riscv-pk/bbl…
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If I implement the Rocket-chip on Zedboard, is there UART of Rocket-chip in the PL part of Zedboard?
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So I've reached this point in the guide:
> Enter to General Setup, mark "Initial RAM filesystem and RAM disk". Then go to the option "Initramfs source file" and press enter to change it to "rootfs.…