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Hello,
I am trying to target an ARM 32-bit processor ... can the code be ported ? where should i start looking for the incompatible instructions ?
Thanks,
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```zig
export fn select(vec1: @Vector(8, u8), vec2: @TypeOf(vec1), vec3: @TypeOf(vec1)) @TypeOf(vec1) {
return (vec1 & (vec2 ^ vec3)) ^ vec3;
}
export fn select2(vec1: @Vector(8, u8), vec2: …
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### Describe the bug
When building for arm32 those libs do not build:
```
# ec2;\
# ec2-instance-connect;\
# polly-sample;\
# ssm;\
# ssm-contacts;\
# ssm-incidents;\
# ssm-sap;\
# sagemak…
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**Failed in:** [runtime-coreclr libraries-jitstress 20240514.1](https://dev.azure.com/dnceng-public/public/_build/results?buildId=674625&view=ms.vss-test-web.build-test-results-tab&runId=16724024&resu…
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Currently, ARM does not generate GT_CMPXCHG nodes; all other targets do.
From the importer:
```
// TODO-ARM-CQ: reenable treating InterlockedCmpXchg32 operation as intrinsic
case CORINFO_INTRINS…
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Request to support ARM32 platform.
ARM64 was added in #118 and there are many comments on that issue about Raspberry Pi and ARM32, so I thought there should be a separate issue for that.
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| | |
| --- | --- |
| Bugzilla Link | [49705](https://llvm.org/bz49705) |
| Version | unspecified |
| OS | All |
| CC | @gkmhub,@int3,@smeenai |
## Extended Description
In particular, watchOS uses…
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### Is your feature request related to a problem?
I would like to use notation on arm32 processors.
### What solution do you propose?
I'd like to see arm in the official releases
### What alternat…
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**Is your feature request related to a problem? Please describe.**
Due to the way envoy is distributed, we will be losing ARM support on the new release. This issue is to track re-adding it.
**…