-
Link to document going over everything:
https://docs.google.com/document/d/1mI4Vhg220751OtfEonEIxSr_ZEsSJKUhNe2mfuamogs/edit?usp=sharing
-
There is a problem that the rays from the quarry and marks are not the original ones, what could be wrong with the PC or mine or mod?
Windows 10 x64
Java 7
DDR 2
CPU intel xeon
GPU amd RX460
S…
-
Hello,
### Issue Description:
There are a few critical warnings which I believe could be solved relatively easily.
A lot of the critical warnings present on the vivado.log file are related to…
-
At the moment [`ddr`](https://github.com/objectionary/ddr) and [`aoi`](https://github.com/objectionary/aoi) uses decoration graph, but don't depend on this repository. Instead, `ddr` has its own graph…
-
On Zynq Ultrascale (ZCU 104), we are using axi_dma_wr to write to the off-chip DDR.
We set a register when `m_axis_write_desc_status_valid & (m_axis_write_desc_status_error !=0)`.
From the C firmw…
-
Trying to login using e amuse gives me this error:
May 10 00:39:56 artemis asphyxia-core[1503279]: at EamuseRootRouter.run (/snapshot/build-env/index.js)
May 10 00:39:56 artemis asphyxia-core[…
-
we talked about the DDR style scoring bar, make it happen :)
bjnix updated
10 years ago
-
I propose the next revision based on Wishbone B4 provide that a Wishbone Pipeline protocol MAY qualify all of certain signals as DDR to reduce pin count and increase transmission rate:
* `ADDR` - A…
-
Maxed out first talalnt tree (lvl42) with crits is absolutely busted, and thats ignoring the ascendant tree.
Ive been playing arcane mage and dealing insane amount damage, one-two shoting hardest mob…
-
The steps mentioned above are generally correct?
1、Enable Secure Boot in MaskROM Mode: Start by enabling secure boot while the device is in MaskROM mode.
2、Verification During Power-On: Upon reboo…