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Can we have support for synthesising necessary files for the 100t variant of digilent arty kit?
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What is observed:
* A compiled litex bitfile for CMOD A7 35t using symbiflow toolchain does not work
* LED chaser does not blink the LEDs
* logging in via lxterm is not possible
* On the o…
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When you don't select the new option to include the debug module, there are several critical warnings that get generated during OoC synthesis due to the XDC not finding the ILA signals. I think the so…
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this shouldn't happen:
```
2:43:05 PM: piview: NoArty
2:43:09 PM: piview: ArtyWire
```
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### 現象
- zybo-z7-10-pmods-petalinux.bit.bin
- zybo-z7-10-pmods-petalinux.dtbo
を以下の手順で読み込むと Bitstream, dtbo のロードは成功し、 GPIO として使えるようになるが
```
cdns-i2c e0004000.i2c: timeout waiting on completi…
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It seems weird that we are using the Digilent Basys OpenOCD configuration file with the Arty board. I'm guessing it is because they are "programmer" compatible?
https://github.com/SymbiFlow/symbifl…
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_From @mithro on July 14, 2014 12:8_
The Xilinx Zynq-7000 series devices are a combined ARM processor with a "series 7" FPGA. The [Digilent ZYBO](http://www.digilentinc.com/Products/Detail.cfm?NavPat…
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Hi, using the ultra.bit present in the repo for Ultrasound Classification throws this error:
![image](https://user-images.githubusercontent.com/72865514/155852269-d2d15c8c-2946-4e02-a507-3ccbc546efe…
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Review the Clad board, check the following;
- [ ] Current connections are identical to [the Digilent Pynq board](http://store.digilentinc.com/pynq-z1-python-productivity-for-zynq/).
- [ ] All pa…
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Hi,
We're trying to build cva6 for the nexys4ddr board, but got the errors pasted below.
For a bit of context :
- building vexriscv for nexys4ddr worked just fine, and we didn't have any iss…