-
https://wiki.sipeed.com/hardware/en/tang/Tang-Nano-Doc/questions.html
None
-
- [x] Switch to KiCAD
# Board layout:
- [x] 4 layer board, solid ground plane, dedicated power layer for 3.3V and 1.2V distribution
- [x] Any optional bridges must be done using special bridge-ty…
-
## Programming model in Insider
The input data is written to a virtual file descriptor. The users only need to create a `vread()` statement in the host program to read output result (processed and r…
-
I'm not sure exactly where on the wiki to start this conversation, but I'm here compiling a few links on LabVIEW FPGA compilation. It's a relatively mature ecosystem that National Instruments has crea…
-
Gentlemen, it is great, that @MJoergen is diving into the hardware architecture / FPGA architecture of QNICE-FGA from scratch, because this shows us, where we might want to add those findings to somet…
-
Good day!
Sorry for the stupid questions! This is my first FPGA and I'm just starting this journey.
I followed your tutorial, but flashed the STM using ST-LINK.
I was able to build a binary file af…
-
Hello,
we just updated the LimeSDR XTRX via the latest bin file on the master branch, i.e. the 1.11 image from https://github.com/myriadrf/LimeSDR-XTRX_GW/blob/b4a7347c6f5a117f1bd425ee5f7075cb38f93…
-
### Description
I have followed the [setup](https://opentitan.org/book/doc/getting_started/setup_fpga.html#cw340-board) process for a new CW340 card, however am unable to get any of the bazel tests t…
-
When I use a freshly programmed FPGA (fresh HyperRAM controller), and then read the control registers, the value of the first read at the first control register is wrong:
```
Control Registers: …
-
When I use a freshly programmed FPGA (fresh HyperRAM controller), and then read the control registers, the value of the first read at the first control register is wrong:
```
Control Registers: …