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Hi ROOT team,
I am opening this issue to document and discuss our plan to add CUDA support to Cling. Maybe someone can open and link an issue on https://root.cern/bugs, I neither have a CERN nor an…
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```"/mnt/users/ssd0/homes/samovar/bsg_bladerunner//bsg_manycore/v/bsg_manycore_endpoint_standard.v", 368: tb.card.fpga.CL.axil_to_mcl_inst.genblk4[0].mcl_endpoint_standard.genblk3.unnamed$$_0: started…
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I am trying to build: https://github.com/google/swiftshader for RISC-V32 but SwiftShader requires CMAKE_CXX_STANDARD 17/c++17. I am wondering, how do I support this feature in RISC-V32?
Actually, …
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Do you have any plans to extend, develop and maintain this language further? If so, what are the plans?
I have some crazy brainstorm ideas:
1. create a comprehensive language for data manipulati…
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Dustin's idea! Show in stall graph, where the print stat start and end was called to be able to better coordinate it with the stats numbers.
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I am trying to implement hammerblade example in pynqz2,ultra96v2, and vu47p but it is running out of resources. This issue has been raised in https://github.com/black-parrot-hdk/zynq-parrot/issues/76…
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```
BSG_FAIL------------------------------------------------------------------------------------------------------>
beebs nbody st
```
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[hardware.mk](https://github.com/bespoke-silicon-group/bsg_replicant/blob/main/libraries/platforms/common/dpi/hardware.mk#L92) line 92 missing `VSOURCES += $(BSG_MANYCORE_DIR)/testbenches/common/v/van…
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(x-post to BSG Manycoree)
It seems unnecessary to have $display statements enabled for every simulation run. Printing information on every run can slow the simulator down, or clog with unnecessary in…
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what should be the expected behavior if vanilla core invalid EVA address (e.g. address space that does not map to local DMEM, or any remote address space (in-group, global))?
options1: treat like a…