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basejump_stl
BaseJump STL: A Standard Template Library for SystemVerilog
http://bjump.org/
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Hotfix: verilog includes
#710
dpetrisko
closed
1 day ago
0
Creating 2019.1 subdirectory for ultrascale bsg_mem
#709
dpetrisko
closed
1 day ago
1
Making bsg_fifo_1r1w_narrowed harden-able
#708
dpetrisko
opened
4 days ago
0
[WIP] Port bsg_cache to verilator
#707
dpetrisko
opened
1 week ago
0
Update bsg_serial_in_parallel_out_full.sv
#706
taylor-bsg
opened
1 week ago
0
Update bsg_dlatch.sv
#705
dpetrisko
opened
1 week ago
0
bump dramsim3 branch to utilization_stat
#704
tommydcjung
closed
1 week ago
0
Adding static library target
#703
dpetrisko
opened
2 weeks ago
0
Naming abstract gen block
#702
dpetrisko
opened
2 weeks ago
0
[WIP] BaseJump STL FuseSoC reference branch
#701
dpetrisko
opened
3 weeks ago
0
Tsmc28 additional modules
#700
dpetrisko
opened
3 weeks ago
2
SDR Token Clock Timing
#699
gaozihou
closed
3 weeks ago
0
2-D Torus NoC
#698
tommydcjung
opened
1 month ago
1
fix bsg_transpose_reduce
#697
tommydcjung
closed
1 month ago
0
A module to reduce 2D array?
#696
tommydcjung
closed
1 month ago
3
bsg_alloc_wavefront
#695
tommydcjung
opened
2 months ago
2
commone interface stl
#694
neilwang0913
opened
2 months ago
3
Fix Verilator Warnings in bsg_mem and bsg_misc
#693
infinitymdm
opened
2 months ago
4
[WIP] Adding wormhole streamer modules
#692
dpetrisko
opened
2 months ago
1
Bsg mem 1r1w from 1rw (rebase #386)
#691
dpetrisko
closed
2 months ago
3
Update README.md
#690
taylor-bsg
closed
3 months ago
0
Removed all synopsys translate_off/on pragmas
#689
sifferman
closed
2 months ago
6
SRAM TSMC 40 nm
#688
amithmath
closed
2 months ago
0
Broken Links
#687
Subashkatel
opened
5 months ago
1
Adding handshake descriptions
#686
dpetrisko
opened
5 months ago
1
Add tests for bsg_serial_in_parallel_out
#685
OroArmor
opened
6 months ago
0
Add tests for bsg_two_fifo
#684
OroArmor
opened
6 months ago
0
Random Coverage Testing of bsg_fifo_1rw_large
#683
Asiadav
opened
6 months ago
2
Adding coverage testing for bsg_imul_iterative
#682
Asiadav
closed
6 months ago
1
Harden Xilinx memories
#681
dpetrisko
closed
5 months ago
1
bsg_dmc: are non-burst write operations supported?
#680
infinitymdm
closed
6 months ago
4
bsg_dmc_s timing parameters
#679
infinitymdm
closed
7 months ago
3
SRAM
#678
amithmath
closed
5 months ago
2
Update bsg_defines.sv for yosys
#677
dpetrisko
closed
8 months ago
0
bsg_dmc/bsg_dmc_dly_line_v3.sv: Fix missing include
#676
infinitymdm
closed
8 months ago
1
bsg_mem/bsg_mem_1rw_sync_mask_write_bit_from_1r1w.sv: Fix variable order
#675
infinitymdm
closed
8 months ago
0
bsg_mem/bsg_mem_1rw_sync_mask_write_bit_from_1r1w.sv: Variable used before declaration
#674
infinitymdm
closed
8 months ago
0
bsg_dataflow/bsg_fifo_bypass.sv: Fix incorrect port name
#673
infinitymdm
closed
8 months ago
0
bsg_dataflow/bsg_fifo_bypass.sv: Port/variable name mismatch
#672
infinitymdm
closed
8 months ago
2
Getting Started with BaseJump STL
#671
ShvetankPrakash
closed
8 months ago
4
Rename bsg_decode_thermometer
#670
dpetrisko
closed
2 months ago
0
Update ascii to rom to work with python 2/3
#669
dpetrisko
closed
10 months ago
1
Reusable module for IPOLY hashing logic
#668
tommydcjung
closed
11 months ago
2
fix bsg_tag_trace_replay
#667
tommydcjung
closed
12 months ago
0
Basejump 2.0
#666
BrendenPage
closed
1 year ago
2
Basejump2.0
#665
BrendenPage
closed
1 year ago
0
fix the issue that max_val_p cannot be set to 2^n
#664
RicoLi424
closed
2 months ago
1
Fix the issue that max_val_p cannot be set to 2^n
#663
RicoLi424
closed
1 year ago
0
bsg_mem_1r1w_one_hot_write_mask_bit/byte
#662
RicoLi424
opened
1 year ago
1
Update bsg_noc_pkg.v to remove `ifdef
#661
dpetrisko
closed
11 months ago
0
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