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bespoke-silicon-group / basejump_stl

BaseJump STL: A Standard Template Library for SystemVerilog
http://bjump.org/
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SRAM #678

Closed amithmath closed 5 months ago

amithmath commented 7 months ago

Just wondering, where did you generate the instance from line #36-57 at the code: https://github.com/bespoke-silicon-group/basejump_stl/blob/master/hard/tsmc_16/bsg_mem/bsg_mem_2r1w_sync.sv ? Because in online TSMC compiler I am unable to locate.

taylor-bsg commented 5 months ago

I believe it was an A R M memory compiler.

amithmath commented 5 months ago

Thanks Michael. So the hard IPs at: https://github.com/bespoke-silicon-group/basejump_stl/tree/master/hard/tsmc_40 is also from A R M memory compiler?