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Hi.
Is it possible to use Vitis AI on zynq7000?
If it works, what is the development process (take zedboard as an example)
How do I need to build the operating environment of the board end, do you …
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Hi,
I would like to add the [ultra96-v2](https://www.avnet.com/wps/portal/us/products/new-product-introductions/npi/aes-ultra96-v2/) board to the list of community supported boards because it's popul…
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Output from `inxi`:
```bash
vladkinoman@pop-os:~$ inxi -Fxz
System:
Kernel: 5.8.0-7630-generic x86_64 bits: 64 compiler: gcc
v: 10.2.0 Desktop: N/A Distro: Pop!_OS 20.10
base: Ubuntu 20.…
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> Disclaimer: My area of expertise does not lend well to me suggesting *how* to make things ASIC resistant. I hope there are some informed opinions floating around out there who can help fill in the …
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Does rpmsg support multiple endpoints that all use the same interrupt?
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Hi!
While I was searching for a xilinx FPGA solution for PCI Express, I stumbled upon litepcie. Since there is very little documentation is available about the litepcie, I am writing my queries her…
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Hi @mariodruiz,
I have encountered some errors of "undefined references" when performed C simulation on pure `udp` example (including `udp.cpp`, `udp.hpp`, `udp_tb.cpp`).
```
Makefile.rules:3…
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I'm currently working towards contributing an Ethernet device driver (Xilinx GEM) for both actual ARMv7 Cortex-A and Cortex-R hardware (Xilinx Zynq-7000, UltraScale RPU) and, for initial QA and unit t…
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### introduction
I recently converted from CUDA to ROCm and it has so far been a pretty smooth transition. Therefore, I want to thank ROCm and the Arch devs for working on this great open-source tool…
t1nux updated
3 years ago
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@cjbe @WeiDaZhang and I have been looking at the timing stability of DRTIO on Kasli (all comments apply equally to Sayma of course).
Expectation:
E1. The latency between TTLs on Kasli DRTIO slaves…