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The hardware development contract funds two rounds of prototype hardware. Each prototype round will generate two copies of the prototype hardware consisting of the following parts. The list reflects t…
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What is the current thinking on putting hard cores on the Metlino/Sayma/etc.?
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After hours to days (depending on the board) the Sayma loses its 1.8V power supply until 12V is cycled. Happens on all 3 boards we have at m-labs, less frequently on sayma3 than on the other two. Seem…
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Summary of conversation:
- [ ] DNP Sayma ADCs and all components they are using (regs, SMPs, etc, etc)
- [ ] Make sure we have enough IO on the AFE digital mezzanine to run a 1MSPS SPI ADC over the …
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@gkasprow WUT starts using github as your primary repository for layout, routing, modeling, etc. This replaces use of private WUT git repository.
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Summarize number and types of signals on RTM.
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# Xilinx Artix7 (A7)
- provides low-speed IO for ICs on RTM
- p/n Xilinx XC7A15T
- RTM connect
- A7 transceivers to KU IOSERDES (how transceivers?)
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