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Seeing this error when running 202311 based tests/snappi_tests/lacp/test_add_remove_link_from_dut.py.
I saw that the protocol is defined in the file:/usr/local/lib/python3.8/dist-packages/snappi/snap…
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(moving this conversation from #2953 )
In some tests, there's an unusual configuration performed on DUT only for 100G FR ports, e.g.:
https://github.com/openconfig/featureprofiles/blob/91796ca845a55…
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**Description:**
I have used python controller to run a stress test on my RPI sample dut (all-clusters-app) on Pair-Unpair test scenario for 10,000 iterations. The test passed in iteration 2763 witho…
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---------------
**Describe the bug**
Using FRR 7.5.
I have an IPv6 static route configured (2::1/128):
```
!
ipv6 route 2::1/128 dp0s7.102
ipv6 route 2::1/128 dp0s6
!
```
```
dut-2#…
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### Feature description
During test events, we were asked to upload files in a specific naming format (e.g. `TC--_log`), where as the log download follows a different naming convention.
We should …
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### Issue Description
Test topology:
- Single ingress and single egress of 400Gbps link speeds between DUT and IXIA.
- DUT is DNX based multi-line card chassis with mix of 100 and 400Gbps interface…
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I have problems understanding the documentation on how to connect the dut entity to the bus. I have these signals on the dut object.
```vhdl
entity spi_master is
port (
spi_miso :…
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#### Description
Able to configure same ip on two ethernet interfaces on sonic device which is not expected
#### Steps to reproduce the issue:
1. Bring up sonic device
2. Configure same ip…
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hello sir,
I am trying to directly test sha256_core.v without using sha256.v as the top-level module. I have written a testbench for it, but when I input the hexadecimal block value, I did not get th…
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This is unrelated to #1476 for all I can see.
Using this simple test case:
test.v
``` verilog
`timescale 1ns/1ps
module test(output y);
endmodule
```
test.py
``` python
import cocotb
…