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OS: Ubuntu 22.04 (WSL)
Vscode: 1.89.1
SystemVerilog: 0.13.9
1. Create an empty project with two modules:
```systemverilog
module top (
input clk
);
spi spi(clk);
endmodule
```
…
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Thank you for the fantastic work on this library! It significantly reduces the effort to get RPC comms established between a host and embedded device.
Currently, the framework as a whole only suppo…
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### Hierarchy of regression failure
Block level
### Failure Description
Tests in VCS consistenly fail with UVM_FATAL:
```
UVM_FATAL @ 4614591 ps: (spi_if.sv:59) [spi_if] Don't call this f…
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(first of all, thanks for all the amazing progress with Rust support for the ESP32, it truly is amazing!)
I'm trying to build an ISP slave device using the ESP32, and of course I want to build it u…
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With an SPI master on some TKey versions (https://github.com/tillitis/tillitis-key1/issues/213) we need some easy way of accessing SPI and the flash chip.
We will probably create a new library, som…
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Hello,
Since I upgraded rundeck exporter to v2.7.0 I'm experiencing following errors in rundeck service.log:
```
2024-06-07T19:51:43,319] ERROR spi.SqlExceptionHelper - 0.707000 cannot be parse…
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Hello, I'm wondering if its possible to run I2S over SPI?
For example, I have the `SPI2` peripheral with pins `PA9` for SCK and `PC1` for MOSI. Within the Cube HAL I know its possible to run the SP…
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**Environment:**
- OS: Windows
- FW Version: v0.29
- SW Version or git tag: v1.4.1 - f4beeb1
**Describe the bug**
The logic analyzer SPI decoder will not appear for different SPI modes other…