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This issue tracks the porting of boards and SoCs to https://github.com/zephyrproject-rtos/zephyr/issues/51833.
### SoC series: AGILEX
- [x] soc: AGILEX
- [x] board: intel_socfpga_agilex_socdk, …
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**Describe the set-up**
* Custom board with STM32L152RCT6A
* FW_L1 V1.10.3
**Describe the bug**
FLASH_SIZE incorrectly reports flash size for cat.3 devices with DEV_ID 0x436.
[STM32L1 Ref…
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**Describe the set-up**
* The board: NUCLEO-L152RE
**Describe the bug**
SystemCoreClockUpdate() does not work correctly when SYSCLK source is HSI.
If SYSCLK source is HSI and HSI_VALUE is not…
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I am trying to attach to the STM32L100 on a Wink Hub v1. swdp_scan and jtag_scan both show the device, but neither will allow me to attach to it.
![Screenshot from 2022-06-21 17-35-53](https://user-i…
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#### Description
The next issue, at cpu/stm32/periph/spi.c, The issue can run correctly, But it is just a coincidence!!!
dma_setup(spi_config[bus].tx_dma,
spi_config[…
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Hi @CMOSTM
The `STM32L152RETx.xml` defined the GPIO configFile version as: `STM32L162xE_gpio_v1_0`
https://github.com/STMicroelectronics/STM32_open_pin_data/blob/d1b80258bc63add9baad70be0ef74f3c4…
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When I build html docs, no html code is generated for the Peripheral APIs. Output from `make html` in the doc subdirectory includes multiple lines with:
`sh: dot: command not found`
as well as multi…
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**Describe the bug**
Fix the internal temperature sensor value (Die temp) incorrect when reading internal temperature from ADC.
This ticket is to fix the incorrect temperature sensor (Die temp)…
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**Describe the bug**
The clock_control_get_subsys_rate() calls returns the wrong frequency value for the PLLCLK clock source on the affected STM32 targets. This is a result of using the wrong PLL sou…
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Me and my team of students are working on a driver for an Ublox SARA N310.
We are planning on merging this driver into Zephyr when the driver is complete.
We currently have a critical issue where …