-
I'd love to merge the GVN branch from @ajvondrak, but I'm having a few test failures (focusing only on `resource:core` and `resource:basis` at the moment):
```
$ [gvn*] rlwrap ./factor
IN: scratchpad…
-
Clang-19 crashed with `#pragma omp simd linear`.
Compiler explorer(assertion trunck): https://godbolt.org/z/e9arYevWx
```
$cat mutant.C
void a (int &x, int &y)
{
#pragma omp simd linear (u…
-
```
libs/QPhiX/include/qphix/blas_new_c.h(893): warning #15552: loop was not vectorized with "simd"
libs/QPhiX/include/qphix/blas_new_c.h(893): warning #15552: loop was not vectorized with "simd"
l…
-
Hi, I'm experimenting with different scoring matrices. I'm finding that while I often get the desired results on the example I'm looking at, when I try running a non-trivial amount of data I invariab…
-
Arm (aarch64) cpus are becoming more popular/powerful (e.g. AWS Graviton instances) ... does Tantivy also specialize SIMD for Arm CPUs?
-
In faiss some features like IVFPQFastScan rely on at least AVX2 level simd, and we could turn on the flag at the compilation, but we can not decide it dynamicly, that is if we turn on the opt flag on …
-
This is to throw some ideas after the immenent release.
1. add -ffast-math compiler option
2. try SIMD-STL.
- It appears that we can enable SIMD (especially AVX/SSE) for many STL (std::*) fu…
-
```rust
#![feature(portable_simd)]
use std::simd::{u8x16, LaneCount, Simd, SimdElement, SimdInt, SimdPartialOrd, SupportedLaneCount};
fn splat(x: T) -> Simd
where
T: SimdElement,
…
-
Currently NanoRT does not utilize SIMD/AVX.
Also no quantized BVH support.
It'd be better to start to consider optimization and quantization.
Fortunately, recent CPU architecture(AlderLake, Z…
-
I made [a recipe](https://github.com/procxx/conan-boost-ex-simd) for fork of the removed Boost.SIMD library (I archived it too [here](https://github.com/procxx/boost.simd)) (not planned for conan-cent…