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Hi,
Although my command is :
.tran 25n 30u
In the middle of the simulation, I got the warning : Netlist warning: Current time exceeds stop time!
At the end, the data shows the simulation is…
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- [x] ComCalibrator Application is Ready to Test -per Oguz
- [x] Need to setup remote access to a computer hooked up to the shaker/circuit.
- [x] Changing Dytran RTU to 254 - so it will never conflict…
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I'm on a Mac running Catalina 10.15.6. If I try to open or save to a folder, Digital can see the folders in my home directory and I can select and dive into them. However, if I want to save or load a …
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In the docs for the driver "If the sel input is high, the output is set to the input value." however I have found that if sel is high and input is high-Z the driver outputs 1 instead of high-Z
This…
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**Actual Behaviour**
Waveforms above 50 kHz appear distorted.
**Expected Behaviour**
Waveforms should appear as they are, as per specifications (there's no specification listed on the maximum…
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Hi there!
Thanks for putting together this whole device and for writing up the publication in eNeuro! I work at the University of Sussex in the UK and we are starting to replicate the design for Ca…
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The bug is that
1) sometimes negate gate (NOT gate) fails in random delay mode. Note that the input is not an Error nor an Unknown, it is just 0, and output is also 0... I do not see how such state…
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I don't see where design in using VDDA (Ananlog 3.3V Supply) in the circuit
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Here are my ideas for 3.9.0:
-Adding a Telnet I/O device: Digital has a telnet device. It's extremely useful and easier to use than the Keyboard and TTY
-"Compiling" circuits to simulate: This f…
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This is something that may not be able to be satisfactorily accomplished with a software implementation, and likely not relevant to anyone but the nerdiest of audiophile nerds, but I thought I'd menti…