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There is a plan to enable AOT Inductor for Intel GPU in PyTorch 2.6. While working on the design, PyTorch Team realized that the Triton kernel is now saved as SPIR-V(IR), while CUDA is cubin(device c…
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Hi,
I have successfully compiled the memguard as a kernel module without any error, but When I am loading it my system crashes and I have to hard reboot the system by removing power supply.
Kind…
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We follow the guide [here](http://pmem.io/2016/02/22/pm-emulation.html) and enable the NVDIMM for the kernel in order to [Setup NVM (DEV-DAX) emulation](https://github.com/ut-osa/strata#1-setup-nvm-de…
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As we kept simplifying the reproducible reduction kernel, we removed the code path that handles contiguous iterators that are not aligned at 16 bytes (`float4`). We should investigate the following op…
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```
What steps will reproduce the problem?
Step 1:
To instrument the kernel we need to use a custom GCC, which I have download
https://address-sanitizer.googlecode.com/files/gcc-r203101-snapshot.tar.…
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```
What steps will reproduce the problem?
Step 1:
To instrument the kernel we need to use a custom GCC, which I have download
https://address-sanitizer.googlecode.com/files/gcc-r203101-snapshot.tar.…
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Parallel compilation support in schedule using the same pool as BEAM. Requires things to be abstracted better.
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HIP/CUDA has separate compilations for host and device. Instructions of host functions are generated by host compilation, during which the compiler has no access to device function pointers. The devic…
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I'm compiling the KSZ9897 (a ksz9567 switch) driver for kernel 4.14, but am getting several compilation errors, some of which seem to be reverts from the most recent commit. Was there a reason for the…
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```
What steps will reproduce the problem?
Step 1:
To instrument the kernel we need to use a custom GCC, which I have download
https://address-sanitizer.googlecode.com/files/gcc-r203101-snapshot.tar.…