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# Bug Report
## One-Line Summary
On a vanilla conda install of ARTIQ-beta, the ``misoc`` python package is missing.
## Issue Details
### Steps to Reproduce
From a command-line prompt wi…
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## Hardware
https://github.com/sinara-hw/mirny/wiki
## CPLD Gateware design
* SPI prefix-based based router (4 PLL, 4 ATT, 4 registers)
* Use only one CS, one EEM
* Independent access to RF…
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# ARTIQ Feature Request
## Problem this request addresses
Python Drivers and ARTIQ controllers for 3rd party hardware are scattered across the M-Labs and Quartiq repositories. The list of a…
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https://nixbld.m-labs.hk/build/28099/nixlog/1
after #1407
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# Bug Report
## Summary
When the `artiq.remoting` module utility is used to upload files to the `/tmp` directory at a remote server through `paramiko.sftp`'s library, if there is another…
ghost updated
5 years ago
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Si5324 seems not to be able to properly pull SDA low. Tested with FPGA and with MMC talking to Si5324. Other than that Si5324 is reacting properly.
We modified pullup resistors on both sides to 10k…
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# Bug Report
## One-Line Summary
Scheduling an experiment that uses an Urukul AD9910 channel causes a `ConnectionResetRerror` in the preceding experiment.
## Issue Details
### Step…
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# Bug Report
## One-Line Summary
The tag on https://anaconda.org/m-labs/artiq-dev were changed to obsolete, which breaks conda/artiq-dev.yaml
## Issue Details
In release-4: conda/artiq-dev…
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Instructions to rework hardware:
* Cut the Si5324 reset trace on the RTM. This is pin 1:
![image](https://user-images.githubusercontent.com/720864/52102149-e2a4cd80-2619-11e9-8ae7-f19230048a23.png)
…
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In no particular order..
- Ethernet interface for configuration, status read back and diagnostics. Not fussy about what kind of interface we have here so long as it's easy for users to interact wit…