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Same as https://github.com/rusefi/rusefi/tree/master/hardware/DDPAK_breakout just four channels and with JLC assembly option
0805 pull-down signal and inline resistors
four input pads/holes di…
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when open the bela_cape_rev_v3 project using kicad, bela_cape-eagle-import.kicad_sym not found, where can get it?
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### Did you test the latest `bugfix-2.1.x` code?
Yes, and the problem still exists.
### Bug Description
The latest bugfix (May 24, 2024) now works on my delta. Calibration and M48 now works, BUT th…
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I've converted an SA-21 to an SA-30 via the pin trick, and flashed the latest firmware release. Vuescan only ever scans up to 6 photos before spitting the roll back out.
Here's a memory dump. Happy…
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Just things I noticed post-submission
- [x] There is still silkscreen under antenna for esp - there should be no silkscreen.
- [x] R3's silkscreen is janked.
- [ ] Adjust C5 silkscreen to not look …
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- [x] Add puzzle to the bottm
- [x] Adjust C5 silkscreen to not look like "C51"
Current silkscreen:
![image](https://github.com/AEFeinstein/Super-2024-Swadge-HW/assets/231180/d9aef3b2-652e-41ab-…
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In Espressif chips there are usually 2 DAC pins available. In the uC of the ESP32-S2, ESP32-S3 family, the majority of the pins can be used freely as SPI, UART, but this does not apply to DAC.
…
bato3 updated
10 months ago
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### Prerequisites
- [X] I have read the documentation and the proposed feature is not implemented.
### Description
When using OpenPnP, it would be great if the .pos file generated by KiCad after pa…
bem22 updated
10 months ago
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aligning the ASIC for soldering is still hard AF. You can't really use the silkscreen markings because the registration between silk and copper is different for every board run.
Maybe we can use a …