-
```
What steps will reproduce the problem?
1. load the dol with sdload
2. load a iso file store in a SDcard
3. play!!
What is the expected output? What do you see instead?
What version of CubeSX or…
-
```
What steps will reproduce the problem?
1. load the dol with sdload
2. load a iso file store in a SDcard
3. play!!
What is the expected output? What do you see instead?
What version of CubeSX or…
-
```
What steps will reproduce the problem?
1. Take NTSC Example
2. Click verify button in IDE
3. Getting declaration error
What is the expected output? What do you see instead?
compile/not compliling…
-
```
What steps will reproduce the problem?
1. Take NTSC Example
2. Click verify button in IDE
3. Getting declaration error
What is the expected output? What do you see instead?
compile/not compliling…
-
```
What steps will reproduce the problem?
1. Take NTSC Example
2. Click verify button in IDE
3. Getting declaration error
What is the expected output? What do you see instead?
compile/not compliling…
-
```
What steps will reproduce the problem?
1. Take NTSC Example
2. Click verify button in IDE
3. Getting declaration error
What is the expected output? What do you see instead?
compile/not compliling…
-
```
What steps will reproduce the problem?
1. Take NTSC Example
2. Click verify button in IDE
3. Getting declaration error
What is the expected output? What do you see instead?
compile/not compliling…
-
```
What steps will reproduce the problem?
1. Take NTSC Example
2. Click verify button in IDE
3. Getting declaration error
What is the expected output? What do you see instead?
compile/not compliling…
-
> Can replicate in NTSC, Probably some psa code somewhere
That ^ may be outdated, will have to double-check
-
Hi, I'm trying to synthesize this project and running into some errors.
I have very little experience with FPGAs so I'm sure I'm doing something wrong. I'm willing to learn though. My goal is to cr…