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The following lines might need some attention:
1. https://github.com/bespoke-silicon-group/bsg_manycore/blob/master/v/bsg_manycore_pod_mesh_array.v#L106
Although it might actually be compatible, b…
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https://github.com/bespoke-silicon-group/bsg_manycore/blob/master/software/py/bsg_manycore_link_gen.py#L220
when I try to allocate 4KB space in DMEM (with nothing else), this assertion triggers.
…
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https://github.com/bespoke-silicon-group/bsg_manycore/blob/1c5b2fdf645689c2e2d274996035b3c31608c6e7/v/bsg_manycore_pod_ruche_array.v#L211
```
Error-[IRIPS] Illegal range in part select
bsg_blader…
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Hi,
I want to ensure that:
If i run the below three commands, the generated bit will print hello world on the uart console after reset?
1 $MODEL_DIR: sims -sys=manycore -x_tiles=1 -y_tiles=1 -m…
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I was wondering, if one want to integrate BSG Manycore onto SoC, I think one can interface it through AXI? I was looking at the codes, I think one integrate through this one: https://github.com/bespo…
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Unused anywhere in bsg_manycore, bsg_replicant, or hb_bigblade. Remove?
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Netherlands eScience Center projects are now published on [https://research-software-directory.org/projects](https://research-software-directory.org/projects) (RSD).
Each project on the RSD can ha…
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1. Maybe vanilla_core has a bug in bsg_manycore/v/vanilla_bean/vanilla_core.v file.
2. Line 791 should be modified to "assign stall_icache_store = icache_v_i & ~icache_yumi_o;"
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Since most CI machines has between one and a half to two CPUs it is a waste not to combine both approaches when appropriate.
Can we use both of these plugins together?
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Just out of curiosity, let me mention there are faster alternatives to xxh3 or algos with about the same speed but jaw-droppingly simpler. See https://github.com/rurban/smhasher/ .
Namely fastest (…