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We are using AXI DMA IP with SG enabled and looking at the code, it seems that SG is only available on the interface if you use VDMA. Is that correct? Is there a different way to use SG functionality …
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Hi,
I'm trying to use u-dma-buffer on my ultra96 board.
here is my device tree
/include/ "system-conf.dtsi"
/ {
reserved-memory {
#address-cells = ;
#size-cells = ;
ranges;
image_bu…
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# Problem
Currently pvlib supports the DeSoto physical model (similar to normal glass), ASHRAE, Martin & Ruiz, and SAPM polynomial, but it doesn't have a pure Fresnel model that allows additional int…
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Hi.
I pulled the https://github.com/Xilinx/Kria-PYNQ/commit/992ffc6079b6224d988b058835b7c44553889132 version of repo.
I ran some DPU and face recognition, edge detection example with no problems…
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After I update the FPGA according to the routine, regenerate the boot.bin file, and re mount it to the partition, the restart development board cannot start.The following is after restart。
After ---[…
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### Is this a new report?
Yes
### System Info
Void 5.10.130_1 x86_64 AuthenticAMD uptodate hold rDFFFFF
### Package(s) Affected
virtualbox-ose-6.1.34_1, virtualbox-ose-dkms-6.1.34_1
### Does a r…
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@OVGN
Hi, First I want to thank you for your great work and that you made it open source which is a very valuable.
I saw a problem in my system using _openHBMC_ and found a workaround for it, so …
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The module of axi_ad9361 has four channels of enable and valid signal output. What is the function of these signals? If I set all these signals to 1, can the module work normally?
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Currently it is not possible to command AGVs in a specific _tangential_ edge-orientation _related to a physical trajectory_.
The only existing way to command AGVs in a edge specific orientation is…