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Since [fpga-zynq](https://github.com/ucb-bar/fpga-zynq) repo is deprecated and broken, there's no option to synthesize Rocket-chip for Zedboard/Zynq-7000(xc7z020). Is there a way to fit this to Zedboa…
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Hi.
I'm very newbie in hardware design system and i'm trying to build `XRT` in docker for `pynq` system also installed via `pip3`, without any Vitis, Vivado or ISE. just for connecting pynq to XRT to…
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Goals:
- [ ] Why ZCU is outputting 10 MHz instead of 400 MHz?
- [ ] Set up memory map and spacely to write and read from Cristian's firmware
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Hello,
I am working with EV3 lego sensor connected with Brickpi3. The Brickpi3 is stacked on the GPIO pins of Zynq board and the lego sensor connected with brickpi3. The Brickpi3 and Zynq board commu…
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Hi! I am currently looking into cost effective solutions for transforming multiple input bit streams (datarate of 24*4bit*8MHz ~768 MBit/s) into UDP packages to send to a PC for storage/post-processin…
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Currently the scripts check for the presence of an ARM core to determine if a board is a Zynq or not when the client disconnects, in order to determine which reset logic to use.
If the Zynq somehow…
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Hi
First of all, let me thank you for all your work. My question is about an use case of the driver
There is article describing the using of the driver on Xilinx Confluence (https://xilinx-wiki.at…
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I have a CAmkES project for which I want to use [`SerialServer`](https://github.com/seL4/global-components/tree/master/components/SerialServer) in order to multiplex access to a serial console. The ha…
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Unclear why this is happening, but sometimes when the push-button to reset the IPMC gets pressed, or after executing the 'restart' command, the Zynq seems to lock, which then requires a power cycle to…
mpv89 updated
5 years ago