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Hi,
The following error is produced when compiling:
/root/workspace/uvvm/uvvm_vvc_framework/src/ti_generic_queue_pkg.vhd:26:10: 'signal', 'constant', 'variable', 'file' or identifier expected
/root/…
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Originally reported in Issue #409
I get this error when compiling UVVM with the script.
```
/home/parallels/projects/uvvm/UVVM_All/uvvm_vvc_framework/src_target_dependent/td_target_support_pkg…
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I have an error with AXI-Lite and AXI-Stream compiling UVVM libraries
```
cruiz@cruiz-pc:~/Descargas$ /usr/local/lib/ghdl/vendors/compile-uvvm.sh --uvvm-vip --src ./UVVM_All/ --out ./pepe
```
…
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Can the vvct be accessed from a procedure or function so that one could make the test sequence more hierarchical. for instance doing something like this?
procedure reg_test is
begin
axilite_w…
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I cant run the example tb for UVVM. I compiled UVVM with ghdl scripts. Below logs are for uart example but irqc_tb also results in the same error. At the beginning sources for UART and IRQC DUT are co…
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Hello,
I can get axialite_read to function. It appears that the data read is not available to the test bench though. Is this intentional? I am guessing a new axilite_read function is required for t…
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Following instances are used in a Test Harness, no additional instantiations done. This plaform is created to check Master and Slave behaviors of the I2C VIP.
i1_i2c_vvc: entity bitvis_vip_i2c.i2c_…
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Hi
We get ambiguity errors due to the added declaration of t_slv_array. Calls to axistream_transmit (for example) as proposed in the QuickRef with (x"00", x"00"...) are indeed not unambiguous anymo…
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How does one declare the the t_axilite_if signal to connect to the vvc in the test harness. The unconstrained arrays need to be constrained I believe.
I tried this.
constant GC_ADDR_WIDTH : intege…
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Hello,
I have an error in axilite_write(). The procedure doesnt receive WREADY and I dont know why...
This is a simple example: https://pastebin.com/tHkMxzh2
I have the error:
```
UVVM: =…