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## Compiler version
`3.6.1-RC1-bin-20241017-59b67fc-NIGHTLY`
## Minimized code
```scala
//> using scala 3.nightly
import scala.language.experimental.betterFors
case class Container[A]…
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In spite of my love for time-nuttery, I have came upon this specification only very recently. Having designed an in-memory date and time format for [Chrono](https://github.com/lifthrasiir/rust-chrono)…
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This is described in http://lemire.me/blog/2016/06/27/a-fast-alternative-to-the-modulo-reduction/
(I'm looking for a fast Bloom filter implementation, and found your implementation uses modulo whic…
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(Edit: I think I found the commit where this issue started: https://github.com/libgdx/libgdx/commit/bfe255a2727377b910be20af48d40867c588a8a3)
Error Overview:
When using libGDX 1.13.0 and a gwt bui…
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The current bitfield implementation is consistent with how GCC/Clang does things, but as noted [here](https://github.com/shader-slang/slang/pull/3639#discussion_r1505121660) and [here](https://github.…
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I would expect that any computation involving 32-bit modulos only requires 64-bit arithmetic, instead of the much slower (and often emulated) 128-bit arithmetic.
When I look at the `Rem` implementa…
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My respect! You have this great project: https://0110.be/posts/ESP32_I2S_WiFi_Microphone , and I would like to ask if it is possible to do continuous reading of a UDP microphone in python? The code be…
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[axi_ram module](https://gist.github.com/promach/cdc4a26aa7dc03538918bbd85344cfb5#file-axi_slave_ram-v-L250) triggers a AXI protocol [violation bit 32 in Xilinx AXI Protocol Checker](https://www.xilin…
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Choosing how precise we want the ADC to be impacts the selection for the Processing Units.
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By dump binary, I found
```
[instance 8] ComponentImport { name: ComponentImportName("wasi:filesystem/types@0.2.0"), ty: Instance(15) }
import [func 1] Import { module: "wasi:filesystem/types@0.2…