-
### Build Version
v1.5.0 7d38dde2
### Operating System Environment
- [ ] Microsoft Windows (32-bit)
- [ ] Microsoft Windows (64-bit)
- [ ] Mac OS X
- [X] Linux (specify distribution and ve…
-
In a RISCV design register addresses are 5 bit signals which are (most of the time) assigned to their own separate variable. Surfer does not have a 5 bit register address to register name translator (…
-
@aardappel and I were discussing this briefly today:
If you were to compile the following array access:
```c
uint32_t array[100];
array[x]
```
in current wasm, you have to generate someth…
binji updated
5 months ago
-
Hello,
It would be nice to have support for NVIDIA GPUs and cards in the emulator. For example, the NVIDIA NV1 which can accelerate Sega Saturn PC ports like Panzer Dragoon or PC games like NASCAR Ra…
-
### Build Version
current
### Operating System Environment
- [ ] Microsoft Windows (32-bit)
- [X] Microsoft Windows (64-bit)
- [ ] Mac OS X
- [ ] Linux (specify distribution and version be…
JeodC updated
6 months ago
-
**Version and Platform (required):**
- Binary Ninja Version: 4.1.5706-dev, 630357d5
- OS: windows
- OS Version: 10
- CPU Architecture: x86_64
**Bug Description:**
Memory Access Violation in me…
-
### Build Version
v1.5 9CB68C2
### Operating System Environment
- [ ] Microsoft Windows (32-bit)
- [X] Microsoft Windows (64-bit)
- [ ] Mac OS X
- [ ] Linux (specify distribution and version below)…
-
This question is intended to replace #33 and #265, and ask the general question of whether or not we can have a type, either user-defined or language-provided, that, when wrapped in a shared reference…
-
Note that this issue is about assembler syntax, functionality and ergonomics; it is, generally speaking, *not* about the ELF file format or the compiler backend.
For those who aren't familiar with …
-
@bacam @rmn30 @jrtc27 @billmcspadden-riscv
The question of how to guide the coevolution of Sail and the RISCV model is interesting and important.
I think we should strive to keep both in sync, if …