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Hi Mr.Eugene, many thanks for your such detailed open-source project sharing.
I am new to FPGA and Vivado and please accept my apologies asking not deep questions:
I want to port your U250 desig…
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Hello and thank you for this repository!
I am trying to understand how can I pack the Vivado Project into an IP, so I can use it with other projects.
Do you have any hints on how to do this?
Thanks…
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I have ALVEO U280 connected with my system. I am able to launch kernels on U280 with opencl. But I am trying to work with PYNQ overlays. But PYNQ doesnot detect devices.
import pynq
pynq.Device.de…
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Our brand new alveo u280 card failed to pass the validation. Detailed information & outputs are listed below. I have noticed that #6104 #6105 are similar to my issue. However I cannot find a solution …
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Hi, I encountered the following problems when running code on U280. My system is Ubuntu 20.04.5. My vitis version is Vitis-Tutorials-2022.2. The device I used is xilinx_u280_gen3x16_xdma_1_202211_1.
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Hi,
is it possible to use the current code (`latest`) with the alveo u280?
If I understand correctly the overlaybins for this board are not available yet so examples like the tensorflow notebook w…
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Hi, expert:
Is it possibel to support xilinx kc705 or kcu105 board?
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Hi,
any chance you will support U250 and U280 soon?
Brgds,
Tore
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Hi,
I'm trying to run the spmv_double benchmark using single precision floating point. To achieve this I modified some parameters in the Makefile, as follows:
SPARSE_dataType: double --> float
SPAR…