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This issue is just a placeholder for the job of porting to a new platform.
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Here is the QNICE branch which is based on the "M2M branch" V1.61 that includes MJoergen's new SD card controller:
https://github.com/sy2002/QNICE-FPGA/tree/mfj_new_sdcard
MJoergen's new SD contro…
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Quote from @MJoergen in a Skype conversation:
Here's an idea for M2M version 3 (or whatever): Add ethernet support (UDP and/or TCP) in QNICE, and then let it read files from a network file share. F…
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This one is not urgent as the use case would also need writeable SD cards, FAT32 to support writing and possibly also support for more RAM:
**The idea is: One day to be able to develop for QNICE on…
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Gentlemen, it is great, that @MJoergen is diving into the hardware architecture / FPGA architecture of QNICE-FGA from scratch, because this shows us, where we might want to add those findings to somet…
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This issue is spawned from issue #41. There, @MJoergen proposed in https://github.com/sy2002/QNICE-FPGA/issues/41#issuecomment-706124316 to adhere to the Avalon-MM interface. @sy2002 answered in https…
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There are open questions that came up while Michael created the great and comprehensive new `test_programs/cpu_test.asm`. Some of them are described here: https://github.com/sy2002/QNICE-FPGA/issues/5…
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The use case is to be able to control the core and menu without needing physical access to the MEGA65. This could either be done over the serial (UART) port or over Ethernet.
This feature can be im…
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First of all, the following decision has to be made:
1. Shall the X flag act as Bernd described it here: https://github.com/sy2002/QNICE-FPGA/issues/160#issuecomment-707624518
2. Or shall the X-…
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At a ton of places within QNICE, we have the situation that you can tell a vhdl entity via a generic some size or some dimension such as speed (in UART) or clock divisors elsewhere.
Here is one of …