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_Originally posted by @Rot127 in https://github.com/capstone-engine/capstone/pull/2523#pullrequestreview-2395323823_
Need to fix all `fixme` in `tests/details/tricore.yaml`
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Currently, there is support for some Infineon chips but only ARM cores. [Infineon Tricore](https://en.wikipedia.org/wiki/Infineon_TriCore) is ubiquitous in safety-critical applications.
Recently, I…
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Hi,
According to https://learn.microsoft.com/en-us/azure/rtos/overview-rtos Infineon TriCore architecture is supported by Azure RTOS but when I looked for a port in https://github.com/azure-rtos/thre…
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Hello,
I'm trying to get the GDB integration working with a build of GDB that supports the TriCore architecture. Right now I'm using this build: https://github.com/NoMore201/tricore-gdb with some min…
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Missing global variable reference in [Erika3 OS](https://github.com/hamma96/ERIKA-OS-on-TriCore
):
```
$ rizin -A out/erika3app.elf
[0x8000433a]> pdf @ dbg.ErrorHook
╎ ; XREFS(28)
╭ vo…
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Ghidra supports Tricore out of the box.
Once https://github.com/rizinorg/rizin/pull/3463 and https://github.com/rizinorg/rizin/pull/3478 are complete and merged, adding Tricore in rz-ghidra should …
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I am experimenting with the tricore-probe, defmt logging and HighTec Rust Aurix compiler version 1.0.0, using the [BW blinky example](https://github.com/bluewind-embedded-systems/bw-r-drivers-tc37x-ex…
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Note, that there are still some missing opcodes in QEMU, and some of the problems were fixed in 8.0.x releases and will be fixed (supposedly all) in 8.1 release:
- [x] https://gitlab.com/qemu-project…
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Masking of instructions requires us to know that a constant is a pointer to a relocatable section. The issue is that in many RISCy architectures the pattern for loading a pointer will be split across …
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Hello,
While this isn't anything that will affect the performance of Ghidra or make it any better or worse at decompiling tricore code, I've noticed a few issues with the current tricore naming con…