Closed wellsleep closed 4 years ago
Hi there,
Firstly thanks for the wonderful tool.
I had a Hikey960 with Debian9, kernel version 4.19.5.
According to the discussion here: https://lists.linaro.org/pipermail/coresight/2019-July/003056.html I modified the python script with adding 1 second after every r/w reg, and use command
python csscan.py -vvv --exclude=0xec040000 --exclude=0xec080000 0xEC000000
to scan Hikey 960 for Coresight component base address.
I was able to get few valid CTI address. However the scan process was always interrupted by kernel panic on CPU 4 or 5. Traces are attached.
[ 267.838332] SError Interrupt on CPU4, code 0xbf000002 -- SError [ 267.838337] CPU: 4 PID: 2353 Comm: python Tainted: G S 4.19.5-hikey #26 [ 267.838338] Hardware name: HiKey960 (DT) [ 267.838340] pstate: 80000000 (Nzcv daif -PAN -UAO) [ 267.838341] pc : 0000aaaab517c114 [ 267.838343] lr : 0000aaaab51b8c08 [ 267.838344] sp : 0000ffffcc9cec20 [ 267.838346] x29: 0000ffffcc9cec20 x28: 0000ffff907d5ea0 [ 267.838350] x27: 0000aaaab53c5000 x26: 0000aaaab53c4420 [ 267.838353] x25: 0000aaaab51b8b48 x24: 0000ffff906e3c20 [ 267.838355] x23: 0000ffff907d5ea2 x22: 0000aaaacc9e6390 [ 267.838358] x21: 0000ffff9041a950 x20: 0000ffff906e3c20 [ 267.838361] x19: 0000aaaab53c5000 x18: 0000aaaab51b9000 [ 267.838364] x17: 0000aaaab517c108 x16: 0000ffff906553d0 [ 267.838366] x15: 000000000000007c x14: 0000000000000006 [ 267.838369] x13: 0000aaaab51d5280 x12: 00000000000651eb [ 267.838372] x11: 0000000000000004 x10: 0000aaaab53d6820 [ 267.838375] x9 : 0000000000000001 x8 : 0000000000000000 [ 267.838377] x7 : 0000000000000000 x6 : 0000ffff906397c8 [ 267.838380] x5 : 0000ffff90657ac8 x4 : 0000ffff90657ac8 [ 267.838383] x3 : 0000ffff90422548 x2 : 0000000000000000 [ 267.838386] x1 : 0000000000000005 x0 : 0000000000000000 [ 267.838389] Kernel panic - not syncing: Asynchronous SError Interrupt [ 267.838391] CPU: 4 PID: 2353 Comm: python Tainted: G S 4.19.5-hikey #26 [ 267.838392] Hardware name: HiKey960 (DT) [ 267.838393] Call trace: [ 267.838395] dump_backtrace+0x0/0x180 [ 267.838396] show_stack+0x14/0x20 [ 267.838397] dump_stack+0x8c/0xac [ 267.838398] panic+0x120/0x28c [ 267.838400] __stack_chk_fail+0x0/0x18 [ 267.838401] arm64_serror_panic+0x74/0x80 [ 267.838402] do_serror+0x5c/0xc8 [ 267.838403] el0_error_naked+0x10/0x18 [ 267.839406] SMP: stopping secondary CPUs [ 267.839407] Kernel Offset: disabled [ 267.839408] CPU features: 0x0,21882004 [ 267.839409] Memory Limit: none [ 268.017721] ---[ end Kernel panic - not syncing: Asynchronous SError Interrupt ]---
Well, I'm quite ok with the result I have got. Just want to raise the problem to see if anyone can improve it.
Thanks,
Hi there,
Firstly thanks for the wonderful tool.
I had a Hikey960 with Debian9, kernel version 4.19.5.
According to the discussion here: https://lists.linaro.org/pipermail/coresight/2019-July/003056.html I modified the python script with adding 1 second after every r/w reg, and use command
to scan Hikey 960 for Coresight component base address.
I was able to get few valid CTI address. However the scan process was always interrupted by kernel panic on CPU 4 or 5. Traces are attached.
Well, I'm quite ok with the result I have got. Just want to raise the problem to see if anyone can improve it.
Thanks,