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AUCOHL
/
Lighter
An automatic clock gating utility
Apache License 2.0
40
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5
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Installation Issue.
#20
Dandy201
opened
18 hours ago
0
Fix all platforms' map files
#19
kanndil
opened
11 months ago
0
Fix sdffe
#18
kanndil
closed
11 months ago
0
Update Reports to include $SDFFE cells
#17
kanndil
closed
11 months ago
0
bug fix in FF Mapping cells
#16
kanndil
closed
11 months ago
0
can i try this in openlane's yosys.
#15
Vinayakamk
closed
11 months ago
9
Solving CI and updating documentation
#14
kanndil
closed
1 year ago
0
Add liberty file for GF180 PDK
#13
kanndil
closed
11 months ago
2
Make the plugin selection for both techmap and memory commands
#12
kanndil
closed
2 years ago
1
Move power_report_summary.csv from the root to a subfolder
#11
shalan
closed
2 years ago
1
report_power.py needs to be generic
#10
kanndil
closed
2 years ago
1
Move module to be part of yosys-f4pga-plugins
#9
mithro
closed
1 year ago
5
Incorporate Lighter into OpenLane.
#8
kanndil
opened
2 years ago
0
Add support for other open source PDKs.
#7
kanndil
opened
2 years ago
2
Add support for other sky130 standard cell libraries.
#6
kanndil
closed
2 years ago
1
Power report does not consider clock-gating cells high activity
#5
kanndil
closed
2 years ago
4
Create LICENSE
#4
kanndil
closed
2 years ago
0
Make lighter PDK independent
#3
kanndil
closed
2 years ago
1
SDFFE mapping crashes validation
#2
kanndil
closed
11 months ago
2
Blake2s_core clock gated design fails in validation
#1
kanndil
closed
2 years ago
1