Akisha11 / Dise-o-digital-en-HDL-

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Subsistema de display #8

Open Akisha11 opened 1 year ago

Akisha11 commented 1 year ago

Crear e implementar en el proyecto el subsistema encargado de tomar los datos y desplegar el código decodificado en un display de 7 segmentos y en concordancia a los requerimientos establecidos.

Akisha11 commented 1 year ago
import tkinter as tk
from random import r and range
root = tk.Tk( )
screen = tk.Canvas(root)
screen.grid( )

offsets=(
    ( 0 , 0 , 1 , 0 ) , # top
    ( 1 , 0 , 1 , 1 ) , # upper right
    ( 1 , 1 , 1 , 2 ) , # lower right
    ( 0 , 2 , 1 , 2 ) , # bottom
    ( 0 , 1 , 0 , 2 ) , # lower left
    ( 0 , 0 , 0 , 1 ) , # upper left
    ( 0 , 1 , 1 , 1 ) , # middle
)

# Orden de los segmentos :
# ( a , b , c , d , e , f , g )
# Activo en alto
# −− a −−
# |     |
# f     b
# |     |
# −− g −−
# |     |
# e     c
# |     |
# −− d −−

class Digit:

    def__init__(self, canvas , x=10, y=10, length =20, width =4):
        self.canvas = canvas
        l = length
        self.segs = [ ]
        for x0 , y0 , x1 , y1 in offsets:
            self.segs.append(canvas.create_line(
                x+x0∗l,y+y0∗l,x+x1∗l,y+y1∗l,
                width = width ,state = ’hidden’))

    def show ( self , segments ):

        for ii d, on in zip (self.segs, segments ):
            self.canvas.item configure (iid,
            state = ’normal’ if on else ’ hidden ’)

dig = Digit ( screen , 10 , 10 ) ##
dig1 = Digit ( screen , 40 , 10 ) ##
dig2 = Digit ( screen , 70 , 10 ) ##
dig3 = Digit ( screen , 100 , 10 ) ##
n = 0

def update ( ) :
global n
dig.show ( ( 1 , 1 , 1 , 1 , 1 , 1 , 0 ) ) # Muestra 0
dig1.show ( ( 1 , 1 , 0 , 1 , 1 , 0 , 1 ) ) # Muestra 2
dig2.show ( ( 1 , 1 , 1 , 0 , 1 , 1 , 1 ) ) # Muestra A

# Segmentos encendiendo aleatoriamente

dig3.show ( tuple ( r and range ( 2 ) for _ in range ( 4 ) ) )
n = ( n+1)%10
root.after(1000 , update )
root.after(1000 , update )
root.mainloop ( )
Akisha11 commented 1 year ago
module display_system (
  input clk,
  input rst,
  input [7:0] data_in,
  output reg [6:0] seg_out,
  output reg [3:0] an_out
);

  reg [7:0] digit0;
  reg [7:0] digit1;
  reg [1:0] state;
  reg [23:0] counter;

  localparam CLK_DIV = 50000;
  localparam DISP_TIME = 10000000;

  always @ (digit0 or digit1) begin
    case ({digit0, digit1})
      8'h00: seg_out = 7'b1000000; // 0
      8'h01: seg_out = 7'b1111001; // 1
      8'h02: seg_out = 7'b0100100; // 2
      8'h03: seg_out = 7'b0110000; // 3
      8'h04: seg_out = 7'b0011001; // 4
      8'h05: seg_out = 7'b0010010; // 5
      8'h06: seg_out = 7'b0000010; // 6
      8'h07: seg_out = 7'b1111000; // 7
      8'h08: seg_out = 7'b0000000; // 8
      8'h09: seg_out = 7'b0010000; // 9
      default: seg_out = 7'b1111111; // Blank
    endcase
  end

  always @ (posedge clk or negedge rst) begin
    if (!rst) begin
      digit0 <= 0;
      digit1 <= 0;
      an_out <= 4'b1110;
      state <= 2'b00;
      counter <= 0;
    end
    else begin
      case (state)
        2'b00: begin 
          digit0 <= data_in % 10;
          an_out <= 4'b1101;
          state <= 2'b01;
        end