Xilinx tools such as Vivado and Vitis communicate with FPGAs through a JTAG interface and an FTDI USB/Serial chip driven by a Xilinx server (hw_server) that communicates with the tools using a proprietary protocol. The server and tools recognize the FTDI chip as a valid target only if it is equipped with a special EEPROM from Digilent.
The tools also support an older, documented*, protocol called Xilinx Virtual Cable (XVC). The code in this repository provides a server that communicates with the Xilinx tools using XVC and works with FTDI chips whether or not they are equipped with the Digilent EEPROM.
Eric Norum (wenorum@lbl.gov)
C development environment libusb -- https://github.com/libusb/libusb
In many cases all that's needed is make make install
You will have to edit the Makefile if you want to install the executable and manual page in non-default locations, or if your C compiler doesn't find the libusb header or library.
XVC FTDI JTAG Copyright (c) 2021, The Regents of the University of California, through Lawrence Berkeley National Laboratory (subject to receipt of any required approvals from the U.S. Dept. of Energy). All rights reserved.
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