Closed Fgfg1 closed 1 year ago
We have a basic Vivado Project set up, and now we are compiling Simulation Libraries for Questa. It took an hour to compile what was needed for Questa.
We have created another Project from the example Vivado HBM project from Xilinx. Our other project can now be simulated.
I am creating a basic Vivado project to figure out how to simulate Xilinx IP on Questa