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Codax2000 / fir-cnn-rtl

SystemVerilog for implementing MATLAB neural net onto Xilinx RFSoC.
MIT License
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Refine FPGA Implementation #80

Closed Codax2000 closed 1 year ago

Codax2000 commented 1 year ago

Add test cases, add debouncer so that start switch doesn't work randomly, and test cases run one at a time