Add native JMP and RET/RTS mnemonics.

[unbibium]

JMP foo should be a synonym for SET PC, foo for all addressing modes.

RET and RTS should both be synonyms for SET PC, POP.

Currently it is possible to emulate these with .DEFINE directives, but the result is case-sensitive unlike real mnemonics, and it is not syntax highlighted in the IDE.

[ghost]

Why on earth would anyone ever want to do this? Are you so lacking in mental capacity that you don't understand an instruction that sets the program counter to a particular value? Are you really that idiotic?

What about RET? How difficult is SET PC, POP? What's more, RET doesn't explicitly state that you're POPping from the stack, so unless you know how RET works at a basic level (which defeats the whole point of calling it RET instead of SET PC, POP), you'll get confused about things being PUSHed to the stack in one part of the code and apparently not POPped from the code later.

This entire suggestion really is a testament to your complete lack of understanding as to the design reasons behind the DCPU-16 ASM mnemonics.

[ghost]

That's not even to mention your complete lack of understanding as to what .define does. Please, please learn how things work before you try to make suggestions in future, or you'll end up similarly embarrassing yourself in front of the whole of github.

[hach-que]

That's a bit harsh Miles.

But no, this change won't be happening. Otherwise, everyone will start wanting their own custom assembler instructions added into the codebase and that's not maintainable.

A better solution would be to provide some sort of case insensitive .define directive, though I'm not sure what that would look like.

[unbibium]

Maybe I don't know what I'm talking about, but can I at least get some credit for not using the phrase "take a dump" in my title? Your rudeness overshadows your reasoning, and discourages me from reading it more than once.

For what it's worth, I've never seen a program that jumped to a subroutine using SET PUSH, PC, or indeed the combination of instructions that would cause a SET PUSH instruction to provide a useful return location. In most cases, they use JSR, which doesn't explicitly state that you're PUSHing to the stack, but has other advantages, the primary one of which, apparently, was that Notch spelled it out in the spec. So, my further efforts will start with building a case that Notch might listen to.

And as for "why anyone would want to do this", it's because it's not very intuitive to use the verb SET both for manipulating memory and branching program execution, because I have poor eyesight and visual distinction is very important to me, because I can read my code faster when I know that an instruction is exiting a subroutine after reading the first word, rather than the third. And 6502, 80x86, 68000, and 8080 all have JMP mnemonics. Z80 has JP.

Do DEFINE directives need to be case sensitive? Maybe I'll just add lowercase ones to my project.

[hach-que]

Actually JSR has semantics which are impossible to produce using other instructions. You can't do it with:

SET PUSH, PC SET PC, _somelabel

because you will return to SET PUSH, PC, not the instruction after SET PC, _somelabel, which is what JSR sets up. Given that it's not possible to write code that represents future code sizes (so you can't even set it up to jump over SET PC, _somelabel) because you can't predict how big or small an instruction will be, especially when considering things like short literal optimization and linker manipulation.

In addition, JSR is actually a basic opcode in the VM (again because it does things that can not be represented at compile time), where as RET and JMP are nothing more than aliases for existing instructions.

[unbibium]

Also, mnemonics change over the time even when the chip design doesn't. There's plenty of old source code for 6502 programs that use BZ instead of BEQ, or LD A instead of LDA, and so forth. So I thought that evolving JMP/RET would be within the rights of the community.

before I go running off to Notch, I'll get all my ducks in a row, and also work in plaid333's description of a branch-always instruction that evaluates into ADD PC, literal which saves memory on small forward jumps.

[hach-que]

I doubt Notch would remove instructions from the DCPU-16. At the moment it's a 1 to 1 mapping of instructions and if you look at various chips you'll find that LDA is often different code to LD A (though functionally the same).

BRA can again be implemented in a two line macro as demonstrated by the page you linked to.

[unbibium]

Who said remove instructions? Never. But he can just put "assemblers may assemble JMP x as SET PC, x" and so forth, and everyone would update their assemblers and all the old "SET PC" code would still be valid, and nobody has to recompile or update their emulators because there's no change to the bytecode, and I can stop whining.

[hach-que]

But SET PC, x is what it's doing under the hood. Calling it JMP doesn't provide any benefits, since SET PC, x will always work into the future.

Assembly isn't about hiding abstractions from the programmer, if you want that, use a higher level language.

[unbibium]

You have a point there. I wonder how the JMP instruction works in all those other chips?

Anyway, you've made yourselves clear, and it's a trivial change that I've overcome with .DEFINE anyway, so I'll just close this issue.

Maybe next time you set your current city to my city, we can set our locations to out and set our orders to a beer.