VHDL array indexing requires to_integer function

[MartinC45]

Description

Arrays require integers for indexing, but the generated VHDL uses unsigned (for non constant values). The function to_integer() should be used.

Example

import dfhdl._

class IntegerIndexingIssue() extends RTDesign:
    val a = Bits(4) <> IN
    val b = Bits(12) X 16 <> VAR.REG init all(all(0))
    val c = Bits(12) <> OUT

    c := b(a)

given options.CompilerOptions.PrintGenFiles = true
given options.CompilerOptions.Backend = backends.vhdl.v2008

@main def main = 
   IntegerIndexingIssue().compile

Output

architecture IntegerIndexingIssue_arch of IntegerIndexingIssue is
  type t_vecX1_std_logic_vector is array (natural range <>) of std_logic_vector;
  signal b     : t_vecX1_std_logic_vector(0 to 16 - 1)(11 downto 0);
  signal b_din : t_vecX1_std_logic_vector(0 to 16 - 1)(11 downto 0);
begin
  process (all)
  begin
    b_din <= b;
    c     <= b(unsigned(a)); -- to_integer(unsigned(a));
  end process;
  process (clk)
  begin
    if rising_edge(clk) then
      if rst = '1' then b <= (0 to 16-1 => x"000");
      else b <= b_din;
      end if;
    end if;
  end process;
end IntegerIndexingIssue_arch;