Digilent / vivado-boards

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redundant port map in genesys2/board.xml #19

Closed zhutmost closed 5 years ago

zhutmost commented 5 years ago

part of code in board.xml of Genesys2 from Line412 to Line435 is not required. It should be removed?

          <port_map logical_port="TRI_I" physical_port="led_8bits_tri_o" dir="in" left="7" right="0"> 
            <pin_maps>
              <pin_map port_index="0" component_pin="led_8bits_tri_o_0"/> 
              <pin_map port_index="1" component_pin="led_8bits_tri_o_1"/> 
              <pin_map port_index="2" component_pin="led_8bits_tri_o_2"/> 
              <pin_map port_index="3" component_pin="led_8bits_tri_o_3"/> 
              <pin_map port_index="4" component_pin="led_8bits_tri_o_4"/> 
              <pin_map port_index="5" component_pin="led_8bits_tri_o_5"/> 
              <pin_map port_index="6" component_pin="led_8bits_tri_o_6"/> 
              <pin_map port_index="7" component_pin="led_8bits_tri_o_7"/> 
            </pin_maps>
          </port_map>
          <port_map logical_port="TRI_O" physical_port="led_8bits_tri_o" dir="out" left="7" right="0"> 
            <pin_maps>
              <pin_map port_index="0" component_pin="led_8bits_tri_o_0"/> 
              <pin_map port_index="1" component_pin="led_8bits_tri_o_1"/> 
              <pin_map port_index="2" component_pin="led_8bits_tri_o_2"/> 
              <pin_map port_index="3" component_pin="led_8bits_tri_o_3"/> 
              <pin_map port_index="4" component_pin="led_8bits_tri_o_4"/> 
              <pin_map port_index="5" component_pin="led_8bits_tri_o_5"/> 
              <pin_map port_index="6" component_pin="led_8bits_tri_o_6"/> 
              <pin_map port_index="7" component_pin="led_8bits_tri_o_7"/> 
            </pin_maps>
          </port_map>
artvvb commented 5 years ago

Resolved with https://github.com/Digilent/vivado-boards/commit/0100dd8652407e2595d4927521552cb2e9f1e61f