Closed JohnStratoudakis closed 4 years ago
As per the README.md -
Memory Interface Generator (MIG) project files are also included for non-Zynq boards which can be used to configure the Xilinx MIG IP for use with Microblaze systems
a MIG.prj file is not necessary for a Zynq board.
The mig.prj file is missing for the Genesys ZU Board:
Genesys-ZU-3EG
https://github.com/Digilent/vivado-boards/tree/master/new/board_files/genesys-zu-3eg/B.0