Efinix-Inc / br2-efinix

Buildroot external tree for building Linux for Efinix RISC-V Sapphire SoC
MIT License
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BR2-Efinix

Welcome to BR2-Efinix.

BR2-Efinix is a custom Buildroot external tree for building Linux for Efinix Sapphire RISC-V SoC. Customized configurations to support Sapphire SoC is given, where OpenSBI, U-boot, Linux, Buildroot configuration files as well as patches are provided.

Overview

Buildroot

Buildroot is a simple, efficient and easy-to-use tool to generate embedded Linux systems through cross-compilation. Learn more at Buildroot official website.

OpenSBI

OpenSBI project provide an open-source reference implementation of the RISC-V SBI specifications for platform-specific firmwares executing in M-mode. Learn more at OpenSBI repository.

U-Boot

U-Boot is a boot loader for Embedded boards based on RISCV, PowerPC, ARM, MIPS and several other processors, which can be installed in a boot ROM and used to initialize and test the hardware or to download and run application code. Learn more at U-Boot repository.

RISC-V Boot Sequence

alt text

image from https://riscv.org/wp-content/uploads/2019/12/Summit_bootflow.pdf

When the board power on, the first stage bootloader copy OpenSBI and U-Boot from SPI flash to external memory (RAM). Then, OpenSBI get executed to initialize the memory, stack pointer, cpus and jump to U-Boot. U-Boot load the Linux kernel and start the Linux.

Efinix Sapphire RISC-V SoC

The Sapphire SoC is based on the VexRiscv core created by Charles Papon. The VexRiscv core is a 32-bit CPU using the ISA RISCV32I with M, A, F, D, and C extensions, has six pipeline stages (fetch, injector, decode, execute, memory, and writeback), and a configurable feature set. See RISC-V Sapphire User Guide from Efinix Support page for more detail on Sapphire SoC.

Requirements

System Dependencies

Some libraries and tools are needed to be installed for building Linux.

Tested on Ubuntu 18.04 LTS

sudo apt-get update && sudo apt-get upgrade -y
sudo apt-get install -y sed make binutils build-essential bash patch gzip \
bzip2 perl tar cpio unzip rsync file bc wget autoconf automake libtool \
mtools jq minicom python3-pip

pip3 install jinja2

Buildroot Dependencies

This repo require specific version of Buildroot to work with. See the VERSION file for the compatible Buildroot version.

Efinix RISC-V Sapphire SoC version

Efinity software version version

Efinity RISC-V Embedded Software IDE

Hardware Requirements

Note: * only required for Trion T120F324.

Hardware Setup

For hardware setup please refer to setup development board document.

Development Flow

The development flow divided into hardware and software. The hardware part more to generating the SoC FPGA bitstream while software more to build Linux kernel and related user space packages.

alt text

Hardware: Generate Efinix Sapphire RISC-V SoC

Efinity software is required to generate the Sapphire RISC-V SoC. There are two ways to generate the Efinix Sapphire RISC-V SoC.

1. Use preconfigure Efinity project

Preconfigure Efinity project with Linux also provided in the repository for quick start. User just need to unzip the project and load the soc.xml project file in the Efinity software and click Synthesize button to generate the fpga bitstream.

The precompiled bitstream file also provided for quick start in the hex format. This file stored in the Efinity project file for each supported development board. By using these files, user are not require to load and compile the Efinity project.

2. Generate Custom SoC

Follow these documents to generate the custom soc.

Software: Build OpenSBI, U-Boot and Linux

Please note that you need to generate the SoC first before proceed with this section. Follow these steps to build Linux image, OpenSBI and U-boot for Ti375C529 development kit using precompile bitstream of Efinity project at boards/efinix/ti375c529/hardware/soc/soc.zip.

To build Linux image on other supported devices see Build Linux Image document.

  1. Clone this repository.

    git clone https://github.com/Efinix-Inc/br2-efinix -b 2021.05.9
    cd br2-efinix
  2. Run init.sh script. Please note that we need to pass the argument -p and -e for generating Linux device tree with ethernet support.

    source init.sh ti375c529 \
    boards/efinix/ti375c529/hardware/soc/soc.h \
    -p -e
  3. Build the Linux.

    make -j$(nproc)
  4. The output images are located in <path/to/br2-efinix/../build_ti375c529/build/images.

    • sdcard.img is a Linux image

    • fw_jump.bin is an OpenSBI image

    • u-boot is an U-boot image

  5. Flash firmware images.

    • Follow Flash firmware image document for flashing the fpga bitstream, opensbi and u-boot into the Ti375C529 devkit.
  6. Flash Linux image sdcard.img in to SD card.

    • you can use Etcher for Linux

    • or, Linux command line to flash the Linux image into SD card. See flash linux document.

  7. Access the board serial console over USB UART. See accessing uart terminal document.

  8. Example of Linux boot.

    alt text

  9. Use the login prompt as root at linux prompt.

  10. Run the demo applications.

What's Next?

  1. You might want to write you own driver or custom application but do no know how to integrate it with Buildroot. See kernel module and package tutorial.

  2. Debugging application using GDB/GDBserver

  3. Debugging Linux Kernel

  4. Linux ethernet support

Documentation

  1. Buildroot documentation.
  2. RISCV Sapphire SoC datasheet
  3. Sapphire SoC Device Tree Generator
  4. Others documentation

Supported Board

Currently supported development board

  1. Trion T120F324
  2. Titanium Ti60F225
  3. Titanium Ti180J484
  4. Titanium Ti375C529

License

This project is licensed under the GPLv2 or later.

Buildroot is licensed under the GPLv2 or later with exceptions.