EladB1 / swervec

Toy compiler/interpreter for learning
0 stars 0 forks source link

Generate IR #13

Open EladB1 opened 10 months ago

EladB1 commented 10 months ago

Need to go from AST to intermediate representation (IR).

IR will make it easier to work on middle/backend stages of compiler like optimization and code generation.

EladB1 commented 10 months ago

Doing research of IR phase of compiler. Thinking of going with LLVM for IR so that it can also be used to generate machine code.

EladB1 commented 10 months ago

Learning LLVM IR in order to be able to generate it from an AST. For now, will keep notes and code in the feat/llvm-gen branch.

EladB1 commented 9 months ago

Need to pick compile target first... putting this on hold until that's done.

EladB1 commented 2 months ago

No longer targeting LLVM; will create custom IR based on either SSA or TAC.