Get FIFO fill counter

[mickeyl]

I'm making very good progress using your code, thanks a lot!

To optimize my sending and receiving code, I wonder whether -- instead of checking the FIFO Status flags for every single frame -- we could perhaps utilize FIFOCI<4:0> which resides in the CiFIFOSTAm register.

Do I understand it wrong or is that a fill counter for the FIFO? By leveraging this value, we could spare a lot of SPI transfers, if we would knew upfront how many frames we can read/write into/outof a FIFO. Of course, since this counter can change "while we're looking at it", we can't eliminate all calls to GetStatus, but perhaps a few, if we're transmitting / sending in batches.

What do you think? Or is there a special why you didn't provide an API to read out FIFOCI?

[Emandhal]

Hi,

This driver takes care of all available configurations and options. So what you are looking for is: eERRORRESULT MCP251XFD_GetNextMessageAddressFIFO(MCP251XFD *pComp, eMCP251XFD_FIFO name, uint32_t* const nextAddress, uint8_t* const nextIndex). You can use it like MCP251XFD_GetNextMessageAddressFIFO(&Comp, FIFO1, NULL, &Index); where Index is what you are looking for. This function takes care of RegMCP251XFD_CiFIFOSTAm_FIFOCI. If you set nextAddress parameter to NULL, it will not try to get it.

[mickeyl]

Great, thank you!