"zicsr" build issue with new toolchain

[scjody]

I'm attempting to build the U2+L firmware for the first time and it fails with the following errors:

Compiling tasks.c
../../../../software/FreeRTOS/Source/tasks.c: Assembler messages:
../../../../software/FreeRTOS/Source/tasks.c:2094: Error: unrecognized opcode `csrc mstatus,8', extension `zicsr' required
../../../../software/FreeRTOS/Source/tasks.c:4221: Error: unrecognized opcode `csrc mstatus,8', extension `zicsr' required
../../../../software/FreeRTOS/Source/tasks.c:4259: Error: unrecognized opcode `csrs mstatus,8', extension `zicsr' required
../../../../software/FreeRTOS/Source/tasks.c:2039: Error: unrecognized opcode `csrc mstatus,8', extension `zicsr' required
../../../common/rules.mk:167: recipe for target 'tasks.o' failed

[scjody]

Based on this comment I added zicsr to the MARCH variables: https://github.com/GideonZ/1541ultimate/pull/380

However this may not be the correct fix because I ended up with a broken firmware that wouldn't boot. (Note that the person who wrote the comment does not own an U2+L.)

[scjody]

Note, I'm currently using rv32i-131023 (GCC 13.2.0) from https://github.com/stnolting/riscv-gcc-prebuilt

[scjody]

With #380, I'm able to build a working firmware for my U2+L 🎉!

The broken firmware issue seems to be a result of a bad u2p_ecp5_impl1.bit, possibly because I used Diamond 3.13 (3.12 doesn't seem to be available anymore). I don't need to modify the FPGA code so I don't plan on digging into this any further.

[GideonZ]

I have Diamond 3.13 builds that work, but I noticed that the timing was not met (by far) with the same settings used as for 3.12. Apparently the makefile doesn't check for this. In other words: check the timing closure manually.