Ratioed clock domains are sorta like initiation interval != 1? maybe?
Useful for DSP ~double pumping kind of things?
my_func()
{
#pragma RATE 2
{
...code here is like unrolled loop comb logic...'happens twice'
... is actually two sequential clock cycles in faster clock domain
... this infers registers then?
... during one clock of current my_func domain...
}
// Default everywhere is RATE=1
some code happening per clock
}
Sequential ordering of the {...} blocks determines comb logic between the domains?
Ratioed clock domains are sorta like initiation interval != 1? maybe?
Useful for DSP ~double pumping kind of things?
Sequential ordering of the
{...}
blocks determines comb logic between the domains?All very quickly sketched out