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JulianKemmerer / PipelineC

A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
https://github.com/JulianKemmerer/PipelineC/wiki
GNU General Public License v3.0
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Implement autopipelined BROMs #84

Open JulianKemmerer opened 2 years ago

JulianKemmerer commented 2 years ago

Non block RAM based ROMs using muxing/LUTs can be done using simple arrays.

Using block rams for ROMs requires using a RAM primitive and simply never using the write enable on the RAM, making it a read only. However, this restricts ROM usage timing/pipelining/latency to being specified by the user - needing to specify if the RAM has input/output regsiters etc - is not autopipelineable.

Instead introduce 'autopipelineable pure function ROM primitive functions' that do not specify input and/or output regs. Instead similar to other pure funcs - pipeline regs are added as needed by the tool.

JulianKemmerer commented 2 years ago

Apparently putting output registers on the RAM can make Vivado adding pipelining in the RAM, helping for large RAMs...maybe URAM only? ...neat...