MIPT-ILab / mipt-mips

Cycle-accurate pre-silicon simulator of RISC-V and MIPS CPUs
http://mipt-ilab.github.io/mipt-mips/
MIT License
341 stars 139 forks source link

Fix llvm-cov integration #1469

Closed pavelkryukov closed 3 years ago

codecov[bot] commented 3 years ago

Codecov Report

Merging #1469 (1001e7a) into master (514d040) will decrease coverage by 2.77%. The diff coverage is n/a.

:exclamation: Current head 1001e7a differs from pull request most recent head d30417a. Consider uploading reports for the commit d30417a to get more accurate results Impacted file tree graph

@@            Coverage Diff             @@
##           master    #1469      +/-   ##
==========================================
- Coverage   99.86%   97.09%   -2.78%     
==========================================
  Files         137      140       +3     
  Lines       11157     9764    -1393     
==========================================
- Hits        11142     9480    -1662     
- Misses         15      284     +269     
Impacted Files Coverage Δ
simulator/mips/mips.h 0.00% <0.00%> (-100.00%) :arrow_down:
simulator/simulator.h 0.00% <0.00%> (-100.00%) :arrow_down:
simulator/infra/target.h 0.00% <0.00%> (-100.00%) :arrow_down:
simulator/memory/memory.h 0.00% <0.00%> (-100.00%) :arrow_down:
simulator/risc_v/risc_v.h 0.00% <0.00%> (-100.00%) :arrow_down:
simulator/func_sim/rf/rf.h 0.00% <0.00%> (-100.00%) :arrow_down:
simulator/infra/exception.h 0.00% <0.00%> (-100.00%) :arrow_down:
simulator/mips/mips_instr.h 0.00% <0.00%> (-100.00%) :arrow_down:
simulator/modules/mem/mem.h 0.00% <0.00%> (-100.00%) :arrow_down:
simulator/kernel/replicant.h 0.00% <0.00%> (-100.00%) :arrow_down:
... and 126 more

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