MIPT-V / MIPT-MIPS is a pre-silicon simulator of MIPS and RISC-V CPU. It measures performance of program running on CPU, thus taking best features of RTL and common functional simulation:
Simulator can be used for different purposes:
Key system-level features:
Key microarchitecture features:
More details about internals are available on Wiki.
For questions, use our Discussions page.
We use C++20 features and Boost 1.71. Thus, you have to use compilers of these versions or newer:
Install Boost before building the project.
To work with RISC-V traces, you need to install RISC-V toolchain. Please follow the official instruction.
To work with MIPS traces, you need to install MIPS binutils. Please follow our manual if you are using Linux, OS X, or Windows.
Our build system is CMake. You should install CMake 3.13.5 or higher. Check our Wiki page to get more details about CMake. Users of IDE (Visual Studio, Eclipse, CodeBlocks etc.) may generate project files with CMake as well.
To generate RISC-V opcodes, CMake uses Python. python3
interpreter should be available in your environment.
-b <filename>
— provide path to ELF binary file to execute.-n <number>
— number of instructions to run. If omitted, simulation continues until halting system call or jump to null
is executed.-I
— modeled ISA. Default version is mars
.
mips32
, mips64
— state-of-the-art MIPSriscv32
, riscv64
, riscv128
— RISC-V with all instructionsspim
, spim64
— simplified MIPS without delayed branchesmipsI
, mipsII
, mipsIII
, mipsIV
— legacy MIPS versions-f
— enables functional simulation only--mars
— enables MARS-compatible mode of system calls-l
— enables per-module output, for instance:
-l fetch,decode
— prints only fetch and decode stages-l cpu
— prints all stages-l cpu,!mem
— print all except mem stage-d
— enables output of functional simulator--tdump
— enables module topology dump into topology.json--bp-mode
— prediction mode. Check supported modes in manual--bp-lru
— prediction replacement policy: LRU, pseudo-LRU, or infinite--bp-size
— branch prediction cache size (amount of tracked branch instructions)--bp-ways
— # of ways in branch prediction cache--icache-type
— instruction cache type: LRU, pseudo-LRU, always-hit, or infinite--icache-size
— instruction cache size in bytes--icache-ways
— # of ways in instruction cache--icache-line-size
— line size of instruction cache--long-alu-latency
- number of execution stages required for long arithmetic instructions to be completegit clone --recursive https://github.com/MIPT-ILab/mipt-mips.git
To build simulator faster, we recommend to install Ninja.
mkdir /path/to/your/build/directory
cd /path/to/your/build/directory
cmake /path/to/mipt-mips/simulator -G "Ninja"
to configure CMakeninja
to get the mipt-mips
binary fileninja
to rebuild project
./mipt-mips -b /path/to/binary
ninja unit-tests && ctest --verbose -C Release
from your build directory.This project is a part of ILab activity at Moscow Institute of Physics and Technology (MIPT).
The main goal of the project is to teach the students the computer architecture through development of a microprocessor implementing the RISC-V and MIPS instruction set in both functional and performance simulators.
Yes, if you attend lectures on Computer Architecture. See our contributing.md file for details.